Symbolic Trajectory Evaluation

A New SAT-Based Algorithm for Symbolic Trajectory Evaluation

We present a new SAT-based algorithm for Symbolic Trajectory Evaluation (STE), and compare it to more established SAT-based techniques for STE.

SAT-Based Assistance in Abstraction Refinement for Symbolic Trajectory Evaluation

We present a SAT-based algorithm for assisting users of Symbolic Trajectory Evaluation (STE) in manual abstraction refinement. We demonstrate the usefulness of the algorithm on a larger case study (the verification of a CAM).

Carnegie Mellon University Formal Hardware Verification by Symbolic Trajectory Evaluation

Formal Veriication by Symbolic Evaluation of Partially-ordered Trajectories

Symbolic trajectory evaluation provides a means to formally verify properties of a sequential system by a modiied form of symbolic simulation. The desired system properties are expressed in a notation combining Boolean expressions and the temporal logic \next-time" operator. In its simplest form, each property is expressed as an assertion A =) C], where the antecedent A expresses some assumed c...

Explaining Symbolic Trajectory Evaluation by Giving It a Faithful Semantics

Symbolic Trajectory Evaluation (STE) is a formal verification technique for hardware. The current STE semantics is not faithful to the proving power of existing STE tools, which obscures the STE theory unnecessarily. In this paper, we present a new closure semantics for STE which does match the proving power of STE model-checkers, and makes STE easier to understand.

Formal Veri cation by Symbolic Evaluation of Partially - OrderedTrajectories

Symbolic trajectory evaluation provides a means to formally verify properties of a sequential system by a modiied form of symbolic simulation. The desired system properties are expressed in a notation combining Boolean expressions and the temporal logic \next-time" operator. In its simplest form, each property is expressed as an assertion A =) C], where the antecedent A expresses some assumed c...